MCS6500
Microcomputer Family
Programming Manual
CHAPTER 7
INDEX REGISTER INSTRUCTIONS
The index registers can be treated as auxiliary-general purpose registers,
having the added ability of being incremented and decremented
because of the normal operations in which they are required to perform.
7.0 LDX - LOAD INDEX REGISTER X FROM MEMORY
Load the index register X from memory.
The symbolic notation is M → X.
LDX does not affect the C or V flags; sets Z if the value
loaded was zero, otherwise resets it; sets N if the value loaded in
bit 7 is a 1; otherwise N is reset, and affects only the X register.
The addressing modes for LDX are Immediate; Absolute; Zero Page;
Absolute Indexed by Y; and Zero Page Indexed by Y.
7.1 LDY - LOAD INDEX REGISTER Y FROM MEMORY
Load the index register Y from memory.
The symbolic notation is M → Y.
LDY does not affect the C or V flags, sets the N flag if the
value loaded in bit 7 is a 1, otherwise resets N, sets Z flag if the
loaded value is zero otherwise resets Z and only affects the Y register.
The addressing modes for load Y are Immediate; Absolute;
Zero Page; Zero Indexed by X, Absolute Indexed by X.
7.2 STX - STORE INDEX REGISTER X IN MEMORY
Transfers value of X register to addressed memory location.
The symbolic notation is X → M.
No flags or registers in the microprocessor are affected by
the store operation. The addressing modes for STX are Absolute,
Zero Page, and Zero Page Indexed by Y.
7.3 STY - STORE INDEX REGISTER Y IN MEMORY
Transfer the value of the Y register to the addressed memory
location. The symbolic notation is Y → M. STY does not affect any
flags or registers in the microprocessor. The addressing modes for
STY are Absolute; Zero Page; and Zero Page Indexed by X.
7.4 INX - INCREMENT INDEX REGISTER X BY ONE
Increment X adds 1 to the current value of the X register. This
is an 8-bit increment which does not affect the carry operation, therefore,
if the value of X before the increment was FF, the resulting
value is 00. The symbolic notation is X + 1 → X. INX does not affect
the carry or overflow flags; it sets the N flag if the result of the
increment has a one in bit 7, otherwise resets N; sets the Z flag if
the result of the increment is 0, otherwise it resets the Z flag.
INX does not affect any other register other than the X register. INX
is a single byte instruction and the only addressing mode is Implied.
7.5 INY - INCREMENT INDEX REGISTER Y BY ONE
Increment Y increments or adds one to the current value in the
Y register, storing the result in the Y register. As in the case of
INX the primary application is to step thru a set of values using the
Y register. The symbolic notation is Y + 1 → Y. The INY does not
affect the carry or overflow flags, sets the N flag if the result of
the increment has a one in bit 7, otherwise resets N, sets Z if
as a result of the increment the Y register is zero otherwise resets
the Z flag. Increment Y is a single byte instruction and the only
addressing mode is Implied.
7.6 DEX - DECREMENT INDEX REGISTER X BY ONE
This instruction subtracts one from the current value of the
index register X and stores the result in the index register X.
The symbolic notation is X - 1 → X.
DEX does not affect the carry or overflow flag, it sets the
N flag if it has bit 7 on as a result of the decrement, otherwise
it resets the N flag; sets the Z flag if X is a as a result of
the decrement, otherwise it resets the Z flag.
DEX is a single byte instruction, the addressing mode is
Implied.
7.7 DEY - DECREMENT INDEX REGISTER Y BY ONE
This instruction subtracts one from the current value in the index
register Y and stores the result into the index register Y. The
result does not affect or consider carry so that the value in
the index register Y is decremented to and then through to FF.
Symbolic notation is Y - 1 → Y.
Decrement Y does not affect the carry or overflow flags; if the
Y register contains bit 7 on as a result of the decrement the N flag
is set, otherwise the N flag is reset. If the Y register is as a
result of the decrement, the Z flag is set otherwise the Z flag is
reset. This instruction only affects the index register Y.
DEY is a single byte instruction and the addressing mode is
Implied.
NOTE : Decrement of the index registers is the most convenient
method of using the index registers as a counter, in that the decrement
involves setting the value N on as a result of having passed
through and sets Z on when the results of the decrement are 0.
7.8 CPX - COMPARE INDEX REGISTER X TO MEMORY
This instruction subtracts the value of the addressed memory
location from the content of index register X using the adder but
does not store the result; therefore, its only use is to set the
N, Z and C flags to allow for comparison between the index register
X and the value in memory.
The symbolic notation is X - M.
The CPX instruction does not affect any register in the machine;
it also does not affect the overflow flag. It causes the carry to be
set on if the absolute value of the index register X is equal to or
greater than the data from memory. If the value of the memory is
greater than the content of the index register X, carry is reset.
If the results of the subtraction contain a bit 7, then the N flag
is set, if not, it is reset. If the value in memory is equal to the
value in index register X, the Z flag is set, otherwise it is reset.
The addressing modes for CPX are Immediate, Absolute and Zero
Page.
7.9 CPY- COMPARE INDEX REGISTER Y TO MEMORY
This instruction performs a two's complement subtraction between
the index register Y and the specified memory location. The results
of the subtraction are not stored anywhere. The instruction is strictly
used to set the flags.
The symbolic notation for CPY is Y - M.
CPY affects no registers in the microprocessor and also does not
affect the overflow flag. If the value in the index register Y is
equal to or greater than the value in the memory, the carry flag will
be set, otherwise it will be cleared. If the results of the subtracttion
contain bit 7 on the N bit will be set, otherwise it will be
cleared. If the value in the index register Y and the value in the
memory are equal, the zero flag will be set, otherwise it will be
cleared.
The addressing modes for CPY are Immediate, Absolute and Zero Page.
7.10 TRANSFERS BETWEEN THE INDEX REGISTERS AND ACCUMULATOR
There are four instructions which allow the accumulator and index
registers to be interchanged. They are TXA, TAX which transfers
the contents of the index register X to the accumulator A and back,
and TYA, TAY which transfers the contents of the index register Y to
the accumulator A and back. The usefulness of this will be discussed
after the instructions.
7.11 TAX - TRANSFER ACCUMULATOR TO INDEX X
This instruction takes the value from accumulator A and transfers
or loads it into the index register X without disturbing the
content of the accumulator A.
The symbolic notation for this is A → X.
TAX only affects the index register X, does not affect the
carry or overflow flags. The N flag is set if the resultant value in
the index register X has bit 7 on, otherwise N is reset. The Z bit
is set if the content of the register X is as a result of the operation,
otherwise it is reset. TAX is a single byte instruction and
its addressing mode is Implied.
7.12 TXA - TRANSFER INDEX X TO ACCUMULATOR
This instruction moves the value that is in the index register
X to the accumulator A without disturbing the content of the index
register X.
The symbolic notation is X → A.
TXA does not affect any register other than the accumulator
and does not affect the carry or overflow flag. If the result in
A has bit 7 on, then the N flag is set, otherwise it is reset. If the
resultant value in the accumulator is 0, then the Z flag is set, otherwise
it is reset.
The addressing mode is Implied, it is a single byte instruction.
7.13 TAY- TRANSFER ACCUMULATOR TO INDEX Y
This instruction moves the value of the accumulator into index
register Y without affecting the accumulator.
The symbolic notation is A → Y.
TAY instruction only affects the Y register and does not affect
either the carry or overflow flags. If the index register Y has bit 7 on,
then N is set, otherwise it is reset. If the content of the index register
Y equals as a result of the operation, Z is set on, otherwise it is reset,
TAY is a single byte instruction and the addressing mode is Implied.
7.14 TYA - TRANSFER INDEX Y TO ACCUMULATOR
This instruction moves the value that is in the index register Y
to accumulator A without disturbing the content of the register Y.
The symbolic notation is Y → A.
TYA does not affect any other register other than the accumulator
and does not affect the carry or overflow flag. If the result in
the accumulator A has bit 7 on, the N flag is set, otherwise it is
reset. If the resultant value in the accumulator A is 0, then the Z
flag is set, otherwise it is reset.
The addressing mode is Implied and it is a single byte instruction.
Some of the applications of the transfer instructions between
accumulator A and index registers X, Y are those when the user wishes
to use the index register to access memory locations where there are
multiple byte values between the addresses. In this application a
count is loaded into the index register, the index register is transferred
to the accumulator, a value such as 5, 7, 10, etc. is added
immediate to the accumulator and results stored back into the index
register using the TAX or TAY instruction. The consequence of this
type of operation is that it allows the microprocessor to address
non-consecutive locations in memory. Another application is where
the internal transfer instructions allow the index registers to hold
intermediate values for the accumulator which allows rapid transfer
to and from the accumulator to help solve high speed data shuffling
problems.
7.15 SUMMARY OF INDEX REGISTER APPLICATIONS AND MANIPULATIONS
Primary use of index register X and Y is as offset and counters
for data manipulation in which the index register is used to compute
an address based on the value of the index register plus base address
specified by the user, either in a fixed instruction format or in a
variable pointer type format. In order to operate as both an offset
and counter, index registers may be incremented or decremented by one
or compared to values from memory. There are limitations on the
applications of each of the index registers which have to do with
formats which are unique to certain instruction addressing modes.
Because of the ability of the index registers to be loaded, changed
and stored, they are also useful as general purpose registers. They
can be used as interim storages for moves between memory locations
or for moves between memory and the accumulator.
One of the optimum uses of the indexing concept is the case
when the index register is being used both as an offset and a counter.
This type of operation uses the ability of the microprocessor to
perform a decrement function on the index registers and set flags.
Therefore, a single decrement instruction not only changes the value
in the counter but can also perform a test on the count value.